S3C2410及硬件系统结构设计

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1、1嵌入式系统嵌入式系统第节:第节:S3C2410S3C2410及硬件系统结构设计及硬件系统结构设计2本节提要本节提要三种存储器及接口区别三种存储器及接口区别S3C2410AS3C2410A中断系统中断系统嵌入式系统的嵌入式系统的I/O接口设计接口设计3三种存储器及接口区别三种存储器及接口区别lSDRAM lNOR FLASH lNAND FLASH4NAND flash5K9F1208U0M-YCB0, K9F1208U0M-YIB0l64M x 8 Bit NAND Flash Memory6Nand flash7Nand flash8Nand flash9NAND FLASH 接口设计接口
2、设计l要求有专门的控制器要求有专门的控制器10NOR Flash (28F320J3(x8/x16))接口)接口11SDRAM (HY57V561620)接口)接口12SDRAM HY57V641620HG13SDRAM14SDRAM15三种存储体的用途三种存储体的用途lNAND FLASHlNOR FLASHlSDRAMl哪种可以在其本身上运行程序?哪种可以在其本身上运行程序?l嵌入式系统的存储系统的硬件配置方案嵌入式系统的存储系统的硬件配置方案16存储系统配置存储系统配置l配置一:配置一:lSDRAMlNOR FLASHlNAND FLASHl配置二:配置二:lSDRAMlNOR FLAS
3、Hl配置三:配置三:lSDRAMlNAND FLASHl单片机(单片机(89S52)配置配置lNOR FLASHlSRAM(256B)17存储系统配置与启动方式存储系统配置与启动方式l从从NOR FLASH启动启动l从从NAND FLASH 启动启动18S3C2410的启动设置的启动设置NOR FLASH 启动启动NAND 启动启动19S3C2410A的NAND启动lRecently, a NOR flash memory gets high in price while an SDRAM and a NAND flash memory get moderate,motivating some
4、 users to execute the boot code on a NAND flashlIn order to support NAND flash bootloader, the S3C2410X is equipped with an internal SRAM buffer called Steppingstone. When booting, the first 4KBytes of the NAND flash memory will be loaded into Steppingstone and the boot code loaded intoSteppingstone
5、 will be executed. 20NAND运行模式运行模式21本节提要本节提要三种存储器及接口区别三种存储器及接口区别S3C2410AS3C2410A中断系统中断系统嵌入式系统的嵌入式系统的I/O接口设计接口设计22S3C2410 中断l多少个中断?lThe interrupt controller in the S3C2410X receives the request from 56 interrupt sources.l中断模式?lWhen receiving multiple interrupt requests from internal peripherals and ex
6、ternal interrupt request pins, the interrupt controller requests FIQ or IRQ interrupt of the ARM920T core after the arbitration procedure.l中断的管理及优先级?lThe arbitration procedure depends on the hardware priority logic and the result is written to the interrupt pending register, which helps users notify
7、 which interrupt is generated out of various interrupt sources.l如何关闭或打开FIQ or IRQ中断?232410中断中断24中断的优先级设置中断的优先级设置l If ARB_SEL bits are 00b, the priority order is REQ0, REQ1, REQ2, REQ3, REQ4, and REQ5.l If ARB_SEL bits are 01b, the priority order is REQ0, REQ2, REQ3, REQ4, REQ1, and REQ5.l If ARB_SEL
8、 bits are 10b, the priority order is REQ0, REQ3, REQ4, REQ1, REQ2, and REQ5.l If ARB_SEL bits are 11b, the priority order is REQ0, REQ4, REQ1, REQ2, REQ3, and REQ5.25中断的优先级设置中断的优先级设置26中断的管理中断的管理lSOURCE PENDING (SRCPND) REGISTERlINTERRUPT MODE (INTMOD) REGISTERlINTERRUPT MASK (INTMSK) REGISTER27异常向量表
9、 FIQ IRQ地地 址址异异 常常进入模式进入模式0 x0000,00000 x0000,0000复位复位管理模式管理模式0 x0000,00040 x0000,0004未定义指令未定义指令未定义模式未定义模式0 x0000,00080 x0000,0008软件中断软件中断管理模式管理模式0 x0000,000C0 x0000,000C中止(预取指令中止(预取指令)中止模式中止模式0 x0000,00100 x0000,0010中止(数据)中止(数据)中止模式中止模式0 x0000,00140 x0000,0014保留保留保留保留0 x0000,00180 x0000,0018IRQIRQI
10、RQIRQ0 x0000,001C0 x0000,001CFIQFIQFIQFIQ2856个中断向量表?个中断向量表?l个中断向量表?个中断向量表?l不是硬件设置的,不是硬件设置的,l软件设计,自己安排软件设计,自己安排29本节提要本节提要三种存储器及接口区别三种存储器及接口区别S3C2410AS3C2410A中断系统中断系统嵌入式系统的嵌入式系统的I/O接口设计接口设计30S3C2410AI/O口口lThe S3C2410X has 117 multi-functional input/output port pins. The ports are:l Port A (GPA): 23-ou
11、tput portl Port B (GPB): 11-input/output portl Port C (GPC): 16-input/output portl Port D (GPD): 16-input/output portl Port E (GPE): 16-input/output portl Port F (GPF): 8-input/output portl Port G (GPG): 16-input/output portl Port H (GPH): 11-input/output port31I/O接口设计 I/OI/O接口电路也简称接口电路。它是主机和外围设备之接口